An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration

We present a network interface (NI) for an on-chip network. Our NI decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transaction-based protocol to achieve backward compatibility with existing bus protocols s...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems 2005-01, Vol.24 (1), p.4-17
Main Authors: Radulescu, A, Dielissen, J, Pestana, S G, Gangwal, O P, Rijpkema, E, Wielage, P, Goossens, K
Format: Article
Language:English
Subjects:
Computation
Computer aided design
Design engineering
Integrated circuits
Joints
Modular
Networks
Ports
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We present a network interface (NI) for an on-chip network. Our NI decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transaction-based protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP, and DTL. Our NI has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via NI ports using the network itself, instead of a separate control interconnect. An example instance of this NI with four ports has an area of 0.25 mm/sup 2/ after layout in 0.13-mum technology, and runs at 500 MHz.
ISSN:0278-0070
DOI:10.1109/TCAD.2004.839493(410)24