Asymmetrical increase of memory window in MFIS devices after avalanche electron injection

We investigated the effects of charge trapping on the asymmetrical increase in the memory window of metal–ferroelectric–insulator–semiconductor (MFIS) devices. We suggest that defect centers located at the ferroelectric–insulator interface play important roles in generating the asymmetrical increase...

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Bibliographic Details
Published in:Thin solid films 2005-03, Vol.475 (1-2), p.139-143
Main Authors: Lee, K.J., Roh, Y., Kim, I.S., Kim, Y.T.
Format: Article
Language:English
Subjects:
Charge trapping
MFIS
Nonvolatile memory
SBN
SBT
Y2O3
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Summary:We investigated the effects of charge trapping on the asymmetrical increase in the memory window of metal–ferroelectric–insulator–semiconductor (MFIS) devices. We suggest that defect centers located at the ferroelectric–insulator interface play important roles in generating the asymmetrical increase in the memory window: Electron trapping at/near the SBN (or SBT)–Y2O3 interface via avalanche electron injection from the Si substrate results in the preferential domain switching, causing the asymmetrical increase in the memory window.
ISSN:0040-6090
1879-2731
DOI:10.1016/j.tsf.2004.07.035