Loading…
Temperature and drain voltage dependence of gate-induced drain leakage
The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL c...
Saved in:
Published in: | Microelectronic engineering 2004-04, Vol.72 (1), p.101-105 |
---|---|
Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
cited_by | cdi_FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3 |
---|---|
cites | cdi_FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3 |
container_end_page | 105 |
container_issue | 1 |
container_start_page | 101 |
container_title | Microelectronic engineering |
container_volume | 72 |
creator | Lopez, L Masson, P Née, D Bouchakour, R |
description | The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL current with temperature and with the drain potential is studded and modeled in the case of a n-MOS transistor. A methodology of parameter extraction is proposed. |
doi_str_mv | 10.1016/j.mee.2003.12.024 |
format | article |
fullrecord | <record><control><sourceid>proquest_cross</sourceid><recordid>TN_cdi_proquest_miscellaneous_29758971</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><els_id>S0167931703005938</els_id><sourcerecordid>29758971</sourcerecordid><originalsourceid>FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3</originalsourceid><addsrcrecordid>eNp9kE1LxDAQhoMouK7-AG-96K01H02b4knEVWHBy97DNJkuWftl0i74782yK948DQPP-w7zEHLLaMYoKx52WYeYcUpFxnhGeX5GFkyVIpWyUOdkEZkyrQQrL8lVCDsa95yqBVltsBvRwzR7TKC3ifXg-mQ_tBNsMbE4Ym-xN5gMTbKFCVPX29ngL9gifEbwmlw00Aa8Oc0l2axeNs9v6frj9f35aZ0aIYsphVxCocBylFJALZSyWBlac255kwOvLbACqcDalkUjkMsS6pJKjkoIDmJJ7o-1ox--ZgyT7lww2LbQ4zAHzatSqqpkEWRH0PghBI-NHr3rwH9rRvVBmN7pKEwfhGnGdRQWM3encggG2sZDb1z4C0pZFapSkXs8chgf3Tv0Ohh3UGSdRzNpO7h_rvwAffmAmQ</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>29758971</pqid></control><display><type>article</type><title>Temperature and drain voltage dependence of gate-induced drain leakage</title><source>Elsevier</source><creator>Lopez, L ; Masson, P ; Née, D ; Bouchakour, R</creator><creatorcontrib>Lopez, L ; Masson, P ; Née, D ; Bouchakour, R</creatorcontrib><description>The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL current with temperature and with the drain potential is studded and modeled in the case of a n-MOS transistor. A methodology of parameter extraction is proposed.</description><identifier>ISSN: 0167-9317</identifier><identifier>EISSN: 1873-5568</identifier><identifier>DOI: 10.1016/j.mee.2003.12.024</identifier><identifier>CODEN: MIENEF</identifier><language>eng</language><publisher>Amsterdam: Elsevier B.V</publisher><subject>Applied sciences ; Band to band tunneling ; Electric, optical and optoelectronic circuits ; Electronics ; Exact sciences and technology ; GIDL ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Theoretical study. Circuits analysis and design ; Transistors</subject><ispartof>Microelectronic engineering, 2004-04, Vol.72 (1), p.101-105</ispartof><rights>2004 Elsevier B.V.</rights><rights>2004 INIST-CNRS</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3</citedby><cites>FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>309,310,314,780,784,789,790,23930,23931,25140,27924,27925</link.rule.ids><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=15596898$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>Lopez, L</creatorcontrib><creatorcontrib>Masson, P</creatorcontrib><creatorcontrib>Née, D</creatorcontrib><creatorcontrib>Bouchakour, R</creatorcontrib><title>Temperature and drain voltage dependence of gate-induced drain leakage</title><title>Microelectronic engineering</title><description>The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL current with temperature and with the drain potential is studded and modeled in the case of a n-MOS transistor. A methodology of parameter extraction is proposed.</description><subject>Applied sciences</subject><subject>Band to band tunneling</subject><subject>Electric, optical and optoelectronic circuits</subject><subject>Electronics</subject><subject>Exact sciences and technology</subject><subject>GIDL</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Theoretical study. Circuits analysis and design</subject><subject>Transistors</subject><issn>0167-9317</issn><issn>1873-5568</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2004</creationdate><recordtype>article</recordtype><recordid>eNp9kE1LxDAQhoMouK7-AG-96K01H02b4knEVWHBy97DNJkuWftl0i74782yK948DQPP-w7zEHLLaMYoKx52WYeYcUpFxnhGeX5GFkyVIpWyUOdkEZkyrQQrL8lVCDsa95yqBVltsBvRwzR7TKC3ifXg-mQ_tBNsMbE4Ym-xN5gMTbKFCVPX29ngL9gifEbwmlw00Aa8Oc0l2axeNs9v6frj9f35aZ0aIYsphVxCocBylFJALZSyWBlac255kwOvLbACqcDalkUjkMsS6pJKjkoIDmJJ7o-1ox--ZgyT7lww2LbQ4zAHzatSqqpkEWRH0PghBI-NHr3rwH9rRvVBmN7pKEwfhGnGdRQWM3encggG2sZDb1z4C0pZFapSkXs8chgf3Tv0Ohh3UGSdRzNpO7h_rvwAffmAmQ</recordid><startdate>20040401</startdate><enddate>20040401</enddate><creator>Lopez, L</creator><creator>Masson, P</creator><creator>Née, D</creator><creator>Bouchakour, R</creator><general>Elsevier B.V</general><general>Elsevier Science</general><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope></search><sort><creationdate>20040401</creationdate><title>Temperature and drain voltage dependence of gate-induced drain leakage</title><author>Lopez, L ; Masson, P ; Née, D ; Bouchakour, R</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2004</creationdate><topic>Applied sciences</topic><topic>Band to band tunneling</topic><topic>Electric, optical and optoelectronic circuits</topic><topic>Electronics</topic><topic>Exact sciences and technology</topic><topic>GIDL</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Theoretical study. Circuits analysis and design</topic><topic>Transistors</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Lopez, L</creatorcontrib><creatorcontrib>Masson, P</creatorcontrib><creatorcontrib>Née, D</creatorcontrib><creatorcontrib>Bouchakour, R</creatorcontrib><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Microelectronic engineering</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Lopez, L</au><au>Masson, P</au><au>Née, D</au><au>Bouchakour, R</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Temperature and drain voltage dependence of gate-induced drain leakage</atitle><jtitle>Microelectronic engineering</jtitle><date>2004-04-01</date><risdate>2004</risdate><volume>72</volume><issue>1</issue><spage>101</spage><epage>105</epage><pages>101-105</pages><issn>0167-9317</issn><eissn>1873-5568</eissn><coden>MIENEF</coden><abstract>The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL current with temperature and with the drain potential is studded and modeled in the case of a n-MOS transistor. A methodology of parameter extraction is proposed.</abstract><cop>Amsterdam</cop><pub>Elsevier B.V</pub><doi>10.1016/j.mee.2003.12.024</doi><tpages>5</tpages></addata></record> |
fulltext | fulltext |
identifier | ISSN: 0167-9317 |
ispartof | Microelectronic engineering, 2004-04, Vol.72 (1), p.101-105 |
issn | 0167-9317 1873-5568 |
language | eng |
recordid | cdi_proquest_miscellaneous_29758971 |
source | Elsevier |
subjects | Applied sciences Band to band tunneling Electric, optical and optoelectronic circuits Electronics Exact sciences and technology GIDL Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Theoretical study. Circuits analysis and design Transistors |
title | Temperature and drain voltage dependence of gate-induced drain leakage |
url | http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T23%3A51%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest_cross&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Temperature%20and%20drain%20voltage%20dependence%20of%20gate-induced%20drain%20leakage&rft.jtitle=Microelectronic%20engineering&rft.au=Lopez,%20L&rft.date=2004-04-01&rft.volume=72&rft.issue=1&rft.spage=101&rft.epage=105&rft.pages=101-105&rft.issn=0167-9317&rft.eissn=1873-5568&rft.coden=MIENEF&rft_id=info:doi/10.1016/j.mee.2003.12.024&rft_dat=%3Cproquest_cross%3E29758971%3C/proquest_cross%3E%3Cgrp_id%3Ecdi_FETCH-LOGICAL-c356t-a45a68ad2e553ab388de9c0b22d2f4a2bda16e03ebd76f3e257ab7052e8332a3%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=29758971&rft_id=info:pmid/&rfr_iscdi=true |