Improving placement under the constant delay model

In this paper, we show that under the constant delay model the placement problem is equivalent to minimizing a weighted sum of wire lengths. The weights can be efficiently computed once in advance and still accurately reflect the circuit area throughout the placement process. The existence of an eff...

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Bibliographic Details
Main Authors: Sulimma, K., Neumann, I., VanGinneken, L., Kunz, W.
Format: Conference Proceeding
Language:English
Subjects:
Capacitance
Circuits
Cost function
Delay effects
Design automation
Equations
Libraries
Semiconductor device modeling
Timing
Wire
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Summary:In this paper, we show that under the constant delay model the placement problem is equivalent to minimizing a weighted sum of wire lengths. The weights can be efficiently computed once in advance and still accurately reflect the circuit area throughout the placement process. The existence of an efficient and accurate cost function allows us to directly optimize circuit area. This leads to better results compared to heuristic edge weight estimates or optimization for secondary criteria such as wire length. We leverage this property to improve a recursive partitioning based tool flow. We achieve area savings of 27% for some circuits and 15% on average. The use of the constant delay model additionally enables timing closure without iterations.
ISSN:1530-1591
1558-1101
DOI:10.1109/DATE.2002.998372