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Specialized Dynamic Optimizations for High-Performance Energy-Efficient Microarchitecture

We study several major characteristics of dynamic optimizationwithin the PARROT power-aware, trace-cache-basedmicroarchitectural framework. We investigate thebenefit of providing optimizations which although tightlycoupled with the microarchitecture in substance are decoupledin time.The tight coupli...

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Bibliographic Details
Main Authors: Almog, Yoav, Rosner, Roni, Schwartz, Naftali, Schmorak, Ari
Format: Conference Proceeding
Language:English
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Summary:We study several major characteristics of dynamic optimizationwithin the PARROT power-aware, trace-cache-basedmicroarchitectural framework. We investigate thebenefit of providing optimizations which although tightlycoupled with the microarchitecture in substance are decoupledin time.The tight coupling in substance provides the potentialfor tailoring optimizations for microarchitecture in amanner impossible or impractical not only for traditionalstatic compilers but even for a JIT. We show that the contributionof common, generic optimizations to processorperformance and energy efficiency may be more thandoubled by creating a more intimate correlation betweenhardware specifics and the optimizer. In particular, dynamicoptimizations can profit greatly from hardwaresupporting fused and SIMDified operations.At the same time, the decoupling in time allows optimizationsto be arbitrarily aggressive without significantperformance loss. We demonstrate that requiring up to512 repetitions before a trace is optimized sacrifices almostno performance or efficiency as compared withlower thresholds. These results confirm the feasibility ofenergy efficient hardware implementation of an aggressiveoptimizer.
DOI:10.5555/977395.977648