Automating mask layout and specification panel session

It is becoming increasingly important that the photomasks needed for a VLSI circuit be produced correctly the first time. To obtain good masks, both the design of the chips and their arraying onto masks must be correct. Much attention has been given to chip design-simulators and design-rule checkers...

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Bibliographic Details
Main Author: Cutler, Robert B.
Format: Conference Proceeding
Language:English
Subjects:
Hardware > Electronic design automation > Physical design (EDA) > Partitioning and floorplanning
Hardware > Very large scale integration design
Online Access:Get full text
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Summary:It is becoming increasingly important that the photomasks needed for a VLSI circuit be produced correctly the first time. To obtain good masks, both the design of the chips and their arraying onto masks must be correct. Much attention has been given to chip design-simulators and design-rule checkers are abundant. In this panel discussion, however, we will be addressing the other aspect-the layout and specification of the masks themselves. Since a growing number of VLSI designers are turning from traditional optical mask-making to electron-beam (E-beam) mask-making, the emphasis of this discussion will be towards E-beam technology, although many of the concepts apply to all mask making.
DOI:10.5555/800032.800669