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Dual band CMOS LNA design with current reuse topology
A dual band receiver architecture is introduced; it is able to make simultaneous operations at two different frequency bands. This architecture uses a dual band low noise amplifier (LNA). A novel high gain and low noise amplifier topology is proposed. This paper presents a general methodology to des...
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Published in: | International journal of electronics 2008-01, Vol.95 (3), p.193-210 |
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Main Authors: | , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A dual band receiver architecture is introduced; it is able to make simultaneous operations at two different frequency bands. This architecture uses a dual band low noise amplifier (LNA). A novel high gain and low noise amplifier topology is proposed. This paper presents a general methodology to design an LNA with current reuse topology for the two standards GSM and UMTS at 947.5 MHz and 2.14 GHz frequencies, respectively. A fully integrated dual band LNA was designed using 0.35 µm CMOS process. At 947.5 MHz, the LNA exhibits a noise figure of 2.3 dB, a voltage gain of 28 dB and CP1 of −12 dBm. However, the LNA at 2.14 GHz features a noise figure of 2.71 dB, a voltage gain of 17 dB and a CP1 of −4.5 dBm. The power consumption is 37.5 mW under a power supply voltage of 2.5 V. |
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ISSN: | 0020-7217 1362-3060 |
DOI: | 10.1080/00207210701827863 |