A 7-GHz multiloop ring oscillator in 0.18-mum CMOS technology

A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed os...

Full description

Saved in:
Bibliographic Details
Published in:Analog integrated circuits and signal processing 2008-09, Vol.56 (3), p.179-184
Main Authors: Liu, Hai Qi, Siek, Liter, Goh, Wang Ling, Lim, Wei Meng
Format: Article
Language:English
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
cited_by
cites
container_end_page 184
container_issue 3
container_start_page 179
container_title Analog integrated circuits and signal processing
container_volume 56
creator Liu, Hai Qi
Siek, Liter
Goh, Wang Ling
Lim, Wei Meng
description A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed oscillator demonstrates a frequency improvement of up to 17% when compared with conventional designs. The fabricated oscillator is measured to cover a frequency range of 6.24-7.04 GHz. Operating in 1.8-V power supply, the oscillator manifests itself a phase noise of -107.7 dBc/Hz@10 MHz offset from a center frequency of 6.25 GHz. The proposed oscillator consumes a current of 40-51 mA from the 1.8-V supply and occupies an area of 440 mum X 430 mum.
doi_str_mv 10.1007/s10470-008-9163-z
format article
fullrecord <record><control><sourceid>proquest</sourceid><recordid>TN_cdi_proquest_miscellaneous_33536038</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>33536038</sourcerecordid><originalsourceid>FETCH-proquest_miscellaneous_335360383</originalsourceid><addsrcrecordid>eNqNzLsOgjAYQOEOmoiXB3Dr5Fb9S4HC4GCIymIcdCeEVKwpLdJ2kKeXwQdwOsvJh9CawpYC8J2lEHEgACnJaMLIMEEBZGFMKDCYobm1LwAIeQQB2h8wJ-diwK1XTipjOtxL3WBja6lU5UyPpcYjnJLWtzi_XG_YifqpjTLNZ4mmj0pZsfp1gTan4z0vSNebtxfWla20tRghLYy3JWMxS4Cl7O_xC9qNPiw</addsrcrecordid><sourcetype>Aggregation Database</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype><pqid>33536038</pqid></control><display><type>article</type><title>A 7-GHz multiloop ring oscillator in 0.18-mum CMOS technology</title><source>Springer Link</source><creator>Liu, Hai Qi ; Siek, Liter ; Goh, Wang Ling ; Lim, Wei Meng</creator><creatorcontrib>Liu, Hai Qi ; Siek, Liter ; Goh, Wang Ling ; Lim, Wei Meng</creatorcontrib><description>A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed oscillator demonstrates a frequency improvement of up to 17% when compared with conventional designs. The fabricated oscillator is measured to cover a frequency range of 6.24-7.04 GHz. Operating in 1.8-V power supply, the oscillator manifests itself a phase noise of -107.7 dBc/Hz@10 MHz offset from a center frequency of 6.25 GHz. The proposed oscillator consumes a current of 40-51 mA from the 1.8-V supply and occupies an area of 440 mum X 430 mum.</description><identifier>ISSN: 0925-1030</identifier><identifier>DOI: 10.1007/s10470-008-9163-z</identifier><language>eng</language><ispartof>Analog integrated circuits and signal processing, 2008-09, Vol.56 (3), p.179-184</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>314,780,784,27924,27925</link.rule.ids></links><search><creatorcontrib>Liu, Hai Qi</creatorcontrib><creatorcontrib>Siek, Liter</creatorcontrib><creatorcontrib>Goh, Wang Ling</creatorcontrib><creatorcontrib>Lim, Wei Meng</creatorcontrib><title>A 7-GHz multiloop ring oscillator in 0.18-mum CMOS technology</title><title>Analog integrated circuits and signal processing</title><description>A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed oscillator demonstrates a frequency improvement of up to 17% when compared with conventional designs. The fabricated oscillator is measured to cover a frequency range of 6.24-7.04 GHz. Operating in 1.8-V power supply, the oscillator manifests itself a phase noise of -107.7 dBc/Hz@10 MHz offset from a center frequency of 6.25 GHz. The proposed oscillator consumes a current of 40-51 mA from the 1.8-V supply and occupies an area of 440 mum X 430 mum.</description><issn>0925-1030</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2008</creationdate><recordtype>article</recordtype><recordid>eNqNzLsOgjAYQOEOmoiXB3Dr5Fb9S4HC4GCIymIcdCeEVKwpLdJ2kKeXwQdwOsvJh9CawpYC8J2lEHEgACnJaMLIMEEBZGFMKDCYobm1LwAIeQQB2h8wJ-diwK1XTipjOtxL3WBja6lU5UyPpcYjnJLWtzi_XG_YifqpjTLNZ4mmj0pZsfp1gTan4z0vSNebtxfWla20tRghLYy3JWMxS4Cl7O_xC9qNPiw</recordid><startdate>20080901</startdate><enddate>20080901</enddate><creator>Liu, Hai Qi</creator><creator>Siek, Liter</creator><creator>Goh, Wang Ling</creator><creator>Lim, Wei Meng</creator><scope>7SC</scope><scope>7SP</scope><scope>8FD</scope><scope>JQ2</scope><scope>L7M</scope><scope>L~C</scope><scope>L~D</scope></search><sort><creationdate>20080901</creationdate><title>A 7-GHz multiloop ring oscillator in 0.18-mum CMOS technology</title><author>Liu, Hai Qi ; Siek, Liter ; Goh, Wang Ling ; Lim, Wei Meng</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-proquest_miscellaneous_335360383</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2008</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Liu, Hai Qi</creatorcontrib><creatorcontrib>Siek, Liter</creatorcontrib><creatorcontrib>Goh, Wang Ling</creatorcontrib><creatorcontrib>Lim, Wei Meng</creatorcontrib><collection>Computer and Information Systems Abstracts</collection><collection>Electronics &amp; Communications Abstracts</collection><collection>Technology Research Database</collection><collection>ProQuest Computer Science Collection</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Computer and Information Systems Abstracts – Academic</collection><collection>Computer and Information Systems Abstracts Professional</collection><jtitle>Analog integrated circuits and signal processing</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Liu, Hai Qi</au><au>Siek, Liter</au><au>Goh, Wang Ling</au><au>Lim, Wei Meng</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A 7-GHz multiloop ring oscillator in 0.18-mum CMOS technology</atitle><jtitle>Analog integrated circuits and signal processing</jtitle><date>2008-09-01</date><risdate>2008</risdate><volume>56</volume><issue>3</issue><spage>179</spage><epage>184</epage><pages>179-184</pages><issn>0925-1030</issn><abstract>A novel delay stage for ring oscillator utilizing multiloop technique is presented in this paper. Different conventional delay stages for the multiloop ring oscillators have been reviewed and analyzed in this work. By using push-pull inverter as the secondary input in its delay cell, the proposed oscillator demonstrates a frequency improvement of up to 17% when compared with conventional designs. The fabricated oscillator is measured to cover a frequency range of 6.24-7.04 GHz. Operating in 1.8-V power supply, the oscillator manifests itself a phase noise of -107.7 dBc/Hz@10 MHz offset from a center frequency of 6.25 GHz. The proposed oscillator consumes a current of 40-51 mA from the 1.8-V supply and occupies an area of 440 mum X 430 mum.</abstract><doi>10.1007/s10470-008-9163-z</doi></addata></record>
fulltext fulltext
identifier ISSN: 0925-1030
ispartof Analog integrated circuits and signal processing, 2008-09, Vol.56 (3), p.179-184
issn 0925-1030
language eng
recordid cdi_proquest_miscellaneous_33536038
source Springer Link
title A 7-GHz multiloop ring oscillator in 0.18-mum CMOS technology
url http://sfxeu10.hosted.exlibrisgroup.com/loughborough?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T08%3A56%3A46IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-proquest&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=A%207-GHz%20multiloop%20ring%20oscillator%20in%200.18-mum%20CMOS%20technology&rft.jtitle=Analog%20integrated%20circuits%20and%20signal%20processing&rft.au=Liu,%20Hai%20Qi&rft.date=2008-09-01&rft.volume=56&rft.issue=3&rft.spage=179&rft.epage=184&rft.pages=179-184&rft.issn=0925-1030&rft_id=info:doi/10.1007/s10470-008-9163-z&rft_dat=%3Cproquest%3E33536038%3C/proquest%3E%3Cgrp_id%3Ecdi_FETCH-proquest_miscellaneous_335360383%3C/grp_id%3E%3Coa%3E%3C/oa%3E%3Curl%3E%3C/url%3E&rft_id=info:oai/&rft_pqid=33536038&rft_id=info:pmid/&rfr_iscdi=true