A simulation study of new multi-objective composite dispatching rules, CONWIP, and push lot release in semiconductor fabrication

This paper evaluates dispatching rules and order release policies in two wafer fabrication facilities (thereafter referred to as 'fab') representing ASIC (application specific integrated circuit) and low-mix high-volume production. Order release policies were fixed-interval (push) release,...

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Bibliographic Details
Published in:International journal of production research 2008-07, Vol.46 (14), p.3801-3824
Main Authors: Bahaji, N., Kuhl, M. E.
Format: Article
Language:English
Subjects:
Applied sciences
Dispatching rules
Electronics
Exact sciences and technology
Microelectronic fabrication (materials and surfaces technology)
Scheduling
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Semiconductor manufacturing
Simulation
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Summary:This paper evaluates dispatching rules and order release policies in two wafer fabrication facilities (thereafter referred to as 'fab') representing ASIC (application specific integrated circuit) and low-mix high-volume production. Order release policies were fixed-interval (push) release, and constant work-in-process (CONWIP) (pull) policy. Following rigorous fab modelling and statistical analysis, new composite dispatching rules were found to be robust for average and variance of flow time, as well as due-date adherence measures, in both production modes.
ISSN:0020-7543
1366-588X
DOI:10.1080/00207540600711879