Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part I: MASH DDSM

Two classes of techniques have been developed to whiten the quantization noise in digital delta-sigma modulators (DDSMs): deterministic and stochastic. In this two-part paper, a design methodology for reduced-complexity DDSMs is presented. The design methodology is based on error masking. Rules for...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. I, Regular papers Regular papers, 2009-04, Vol.56 (4), p.714-726
Main Authors: Zhipeng Ye, Kennedy, M.P.
Format: Article
Language:English
Subjects:
Delta modulation
Delta-sigma modulation
Design engineering
Design methodology
Digital
Digital delta-sigma modulators (DDSMs)
Digital modulation
error masking
Errors
Feedback loop
Hardware
Masking
Modulators
Multi-stage noise shaping
Multistage
MultistAge noise SHaping (MASH)
Noise
Quantization
Semiconductor device noise
Stochastic resonance
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Summary:Two classes of techniques have been developed to whiten the quantization noise in digital delta-sigma modulators (DDSMs): deterministic and stochastic. In this two-part paper, a design methodology for reduced-complexity DDSMs is presented. The design methodology is based on error masking. Rules for selecting the word lengths of the stages in multistage architectures are presented. We show that the hardware requirement can be reduced by up to 20% compared with a conventional design, without sacrificing performance. Simulation and experimental results confirm theoretical predictions. Part I addresses MultistAge noise SHaping (MASH) DDSMs; Part II focuses on single-quantizer DDSMs.
ISSN:1549-8328
1558-0806
DOI:10.1109/TCSI.2008.2003383