Partially Depleted SONOS FinFET for Unified RAM (URAM)-Unified Function for High-Speed 1T DRAM and Nonvolatile Memory

Unified random access memory (URAM) is demonstrated for the first time. The novel partially depleted (PD) SONOS FinFET provides unified function of a high-speed capacitorless 1T DRAM and a nonvolatile memory (NVM). The combination of an oxide/nitride/oxide (O/N/O) layer and a floating-body facilitat...

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Bibliographic Details
Published in:IEEE electron device letters 2008-07, Vol.29 (7), p.781-783
Main Authors: Han, Jin-Woo, Ryu, Seong-Wan, Kim, Chung-Jin, Kim, Sungho, Im, Maesoon, Choi, Sung Jin, Kim, Jin Soo, Kim, Kwang Hee, Lee, Gi Sung, Oh, Jae Sub, Song, Myeong Ho, Park, Yun Chang, Kim, Jeoung Woo, Choi, Yang-Kyu
Format: Article
Language:English
Subjects:
1T DRAM
Capacitorless DRAM
Embedded system
FinFET
FinFETs
Integrated circuit yield
Nonvolatile memory
nonvolatile memory (NVM)
Random access memory
Read-write memory
Silicon on insulator technology
SONOS
SONOS devices
System-on-a-chip
Tunneling
unified RAM (URAM)
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Summary:Unified random access memory (URAM) is demonstrated for the first time. The novel partially depleted (PD) SONOS FinFET provides unified function of a high-speed capacitorless 1T DRAM and a nonvolatile memory (NVM). The combination of an oxide/nitride/oxide (O/N/O) layer and a floating-body facilitates URAM operation in PD SONOS FinFETs. An NVM function is achieved by FN tunneling into the O/N/O stack and, a 1T-DRAM function is achieved by excessive-hole accumulation in the PD body. The fabricated PD SONOS FinFET shows retention time exceeding 10 years for NVM operation and program/erase time below 6 ns for 1T-DRAM in a single-cell transistor. These two memory functions are guaranteed without disturbance between them.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2008.2000616