Increased Rate of Multiple-Bit Upset From Neutrons at Large Angles of Incidence

Neutron interactions with terrestrial systems produce soft errors, increasing the failure-in-time (FIT) rate of advanced CMOS circuits. These neutron-induced errors are a critical reliability problem facing advanced technologies. This paper reports the accelerated neutron testing on a 90-nm CMOS SRA...

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Bibliographic Details
Published in:IEEE transactions on device and materials reliability 2008-09, Vol.8 (3), p.565-570
Main Authors: Tipton, A.D., Xiaowei Zhu, Haixiao Weng, Pellish, J.A., Fleming, P.R., Schrimpf, R.D., Reed, R.A., Weller, R.A., Mendenhall, M.
Format: Magazinearticle
Language:English
Subjects:
Accelerated tests
Angle of incidence
Circuit testing
Circuits
CMOS
CMOS technology
Devices
Error correction
Incidence
Life estimation
Mathematical models
Multiple-bit upset (MBU)
NASA
neutron
Neutrons
Predictive models
Protons
Random access memory
Semiconductor device modeling
soft error
Soft errors
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Summary:Neutron interactions with terrestrial systems produce soft errors, increasing the failure-in-time (FIT) rate of advanced CMOS circuits. These neutron-induced errors are a critical reliability problem facing advanced technologies. This paper reports the accelerated neutron testing on a 90-nm CMOS SRAM that exhibits an increased multiple-bit upset FIT rate from neutrons at large angles of incidence. The modeling of these data is used to predict the reliability of ground-based systems.
ISSN:1530-4388
1558-2574
DOI:10.1109/TDMR.2008.2002356