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An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops
An edge missing compensator (EMC) is proposed to approach the function of an ideal PD with plusmn2 N-1 times 2pi linear range with N-bit EMC. A PLL implemented with a 9-bit EMC achieves 320 MHz frequency hopping within 10 mus logarithmically which is about 2.4 times faster than the conventional desi...
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Published in: | IEEE journal of solid-state circuits 2009-11, Vol.44 (11), p.3102-3110 |
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Main Authors: | , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | An edge missing compensator (EMC) is proposed to approach the function of an ideal PD with plusmn2 N-1 times 2pi linear range with N-bit EMC. A PLL implemented with a 9-bit EMC achieves 320 MHz frequency hopping within 10 mus logarithmically which is about 2.4 times faster than the conventional design. The reference spur of the PLL is -48.7 dBc and the phase noise is -88.31dBc/Hz at 10 kHz offset with K VCO = - 2 GHz/V. |
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ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2009.2031209 |