High Voltage Driver for RSFQ Digital Signal Processor

We present an Rapid Single Flux Quantum (RSFQ) based high voltage driver (HVD) developed for the first amplification stage of a hybrid semiconductor-superconductor memory interface for the RSFQ digital signal processor. Implementation of the driver allows to eliminate the impedance mismatch between...

Full description

Saved in:
Bibliographic Details
Published in:IEEE transactions on applied superconductivity 2007-06, Vol.17 (2), p.470-473
Main Authors: Soloviev, I.I., Rafique, M.R., Engseth, H., Kidiyarova-Shevchenko, A.
Format: Article
Language:English
Subjects:
Amplification
Bit error rate
Circuit simulation
Digital
Digital signal processors
Driver circuits
Drivers
High voltage driver
High voltages
Impedance
LNA
Microprocessors
Nonhomogeneous media
quasi-coplanar line
RSFQ
RSFQ driver
Semiconductor device reliability
Semiconductors
Signal processing
Signal to noise ratio
SQUIDs
Voltage
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:We present an Rapid Single Flux Quantum (RSFQ) based high voltage driver (HVD) developed for the first amplification stage of a hybrid semiconductor-superconductor memory interface for the RSFQ digital signal processor. Implementation of the driver allows to eliminate the impedance mismatch between RSFQ and standard 50 Omega input of semiconductor electronics and increases the signal-to-noise ratio to reach reliable signal transmission with sufficiently low bit error rate. The driver design is based on the serial stack of 8 SQUIDs with specially configured ground-cuts that form a quasi-coplanar line with 50 Omega impedance. The impedance of the driver has been extracted using 3D EM simulators that accurately take into account multilayer structure and capacitance to the ground. The circuit has been designed for the Hypres 4.5 kA/cm 2 process. The driver was simulated numerically in PSCAN. The driver can produce output signal at 1 Gbit/s speed and 2.4 mV signal level that is enough to be sensed by low-noise amplifier on the further amplification stage.
ISSN:1051-8223
1558-2515
1558-2515
DOI:10.1109/TASC.2007.898070