Stacking Technology for a Space Constrained Microsystem

• Published in: Journal of intelligent material systems and structures 1998-09, Vol.9 (9), p.749-754
• Main Authors: Heschel, M., Kuhmann, J. F., Bouwstra, S., Amskov, M.
• Format: Article
• Language: English
• Subjects: Applied sciences; Design. Technologies. Operation analysis. Testing; Electronics; Exact sciences and technology; General equipment and techniques; Instruments, apparatus, components and techniques common to several branches of physics and astronomy; Integrated circuits; Mechanical engineering. Machine design; Physics; Precision engineering, watch making; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Servo and control equipment; robots
• ISSN: 1045-389X; 1530-8138
• DOI: 10.1177/1045389X9800900907

In this paper we present a stacking technology for an integrated packaging of an intelligent transducer which is formed by a micromachined silicon transducer and an integrated circuit chip. Transducer and circuitry are stacked on top of each other with an intermediate chip in between. This intermediate chip is made of silicon and carries electrical frontside to backside interconnections through anisotropically etched holes. The electrical feedthrough interconnections are realized by means of lift-off technique. The bonding of the transducer and the intermediate chip is done by fluxless flip chip solder bump bonding. The bonding between the above twolayer stack and the circuit chip is done by conductive adhesive bonding combined with gold studs. We demonstrate the stacking technologies on passive test chips rather than real devices and report on technological details.