Loading…
Tungsten-dual polymetal technology for low resistive gate electrode
We developed ultra-low resistive tungsten dual polymetal (W/barrier metal/dual poly-Si) gate technology suitable for a high performance and high density dynamic random access memory (DRAM) device by using a Ti-based diffusion barrier and a unique tungsten chemical vapor deposition (CVD) process with...
Saved in:
Published in: | Solid-state electronics 2010-06, Vol.54 (6), p.650-653 |
---|---|
Main Authors: | , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | We developed ultra-low resistive tungsten dual polymetal (W/barrier metal/dual poly-Si) gate technology suitable for a high performance and high density dynamic random access memory (DRAM) device by using a Ti-based diffusion barrier and a unique tungsten chemical vapor deposition (CVD) process with a B
2H
6-based nucleation layer. The new low resistive CVD-W deposited on Ti/WN diffusion barrier of dual polymetal gate process not only reveals good oxide reliability comparable to the physical vapor deposition, PVD-W process, but also highly improved transistor performance with signal delay characteristics. |
---|---|
ISSN: | 0038-1101 1879-2405 |
DOI: | 10.1016/j.sse.2010.03.001 |