A New CMOS Analog Front End for RFID Tags

This paper presents a new CMOS integrated analog front-end circuit for 13.56-MHz radio-frequency identification tags. The proposed analog front end consists of a novel CMOS rectified voltage multiplier, a voltage regulator, and a new frequency-shift keying (FSK) demodulator. The proposed single-stag...

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Bibliographic Details
Published in:IEEE transactions on industrial electronics (1982) 2009-07, Vol.56 (7), p.2299-2307
Main Authors: Hwang, Y.-S., Lin, H.-C.
Format: Article
Language:English
Subjects:
Circuits
CMOS
CMOS analog integrated circuits
CMOS technology
Demodulation
Demodulators
Detectors
Electric potential
Frequency shift keying
Frequency-shift keying (FSK) demodulator
Inverters
Multiplexing
Radio frequency
radio-frequency identification (RFID)
Radiofrequency identification
rectifier
Rectifiers
regulator
Regulators
RFID tags
Studies
Tags
Voltage
voltage multiplier
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Summary:This paper presents a new CMOS integrated analog front-end circuit for 13.56-MHz radio-frequency identification tags. The proposed analog front end consists of a novel CMOS rectified voltage multiplier, a voltage regulator, and a new frequency-shift keying (FSK) demodulator. The proposed single-stage rectifier employing only a PMOS/NMOS pass transistor, an inverter, and one capacitor gets minimal active area and enhances the power conversion efficiency. Moreover, a new technique is used in the proposed FSK demodulator, which includes the data recovery circuit, the multiplexer, the shift register, the phase frequency detector, and the charge-pump circuit. The analog front end has been fabricated in a CMOS 0.35-mum 2P4M technology. The demodulator circuit supports a data rate of 10 kb/s to 1 Mb/s. The power consumption is as low as 0.96 mW, and the chip area without pads is only 0.74 mm times 0.43 mm. Experimental results show that the proposed analog front end works well and confirms the theoretical analysis.
ISSN:0278-0046
1557-9948
DOI:10.1109/TIE.2008.2011348