A Differential-Ramp Based 65 dB-Linear VGA Technique in 65 nm CMOS

In this paper, a differential-ramp based variable gain amplifier (VGA) technique is introduced. Using the proposed technique, digitally programmable gain amplifiers (PGAs) can be converted to analog controlled, dB-linear VGAs with minimum impact on noise and linearity. This provides an efficient way...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits 2009-09, Vol.44 (9), p.2503-2514
Main Authors: Elwan, H., Tekin, A., Pedrotti, K.
Format: Article
Language:English
Subjects:
Amplifiers
Applied sciences
Channels
Circuit noise
Circuit properties
Circuits
CMOS
CMOS process
DB-in-Linear
Density
Design. Technologies. Operation analysis. Testing
Differential amplifiers
Digital circuits
DVB-H/T
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Electronics packaging
Exact sciences and technology
Gain
Gain measurement
Integrated circuits
ISDB-T
linear baseband amplifiers
Linearity
Mobile TV
Noise
OFDM
Ramps
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Switches
Switching circuits
Switching, multiplexing, switched capacity circuits
variable gain amplifier (VGA)
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Summary:In this paper, a differential-ramp based variable gain amplifier (VGA) technique is introduced. Using the proposed technique, digitally programmable gain amplifiers (PGAs) can be converted to analog controlled, dB-linear VGAs with minimum impact on noise and linearity. This provides an efficient way of realizing an analog controlled VGA for OFDM based applications. The technique is illustrated by converting an opamp based high-linearity, low-noise PGA to a dB-linear VGA for CMOS mobile TV applications. The design including the cascade of a two-stage continuous 65-dB-linear VGA and a third-order Sallen-Key buffer stage is fabricated in a 65 nm CMOS process. The measured in-band OIP3 of the whole chain at maximum gain of 47 dB is 22 dBm, whereas the blockers in the adjacent channel result in 34 dBm OIP3 for the same gain setting. The design achieves 11 nV/¿(Hz) input referred noise density and occupies a die area of 0.17 mm 2 . The VGA circuit consumes 1.5 mA of current from a 1.2 V supply with an additional 200 ¿A switch control ramp current from a 2.5 V supply.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2009.2021446