Real-Time Reconfigurable Subthreshold CMOS Perceptron

In this paper, a new, real-time reconfigurable perceptron circuit element is presented. A six-transistor version used as a threshold gate, having a fan-in of three, producing adequate outputs for threshold of T = 1,2 and 3 is demonstrated by chip measurements. Subthreshold operation for supply volta...

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Bibliographic Details
Published in:IEEE transaction on neural networks and learning systems 2008-04, Vol.19 (4), p.645-657
Main Authors: Aunet, S., Oelmann, B., Norseng, P.A., Berg, Y.
Format: Article
Language:English
Subjects:
Analog-Digital Conversion
Applied sciences
Artificial intelligence
Circuit simulation
Circuits
CMOS
Complimentary metal-oxide-semiconductor (CMOS)
Compulsive Behavior
Computer science
control theory
systems
Computer simulation
Connectionism. Neural networks
defect tolerant
Delay
Electric potential
Electrical engineering, electronics and photonics
Elektroteknik, elektronik och fotonik
Equipment Design
Equipment Failure Analysis
Exact sciences and technology
Humans
nanoscale
Neural networks
Neural Networks (Computer)
Neurons
Oxides
perceptron
Predictive models
Probability
Real time
Redundancy
Ring oscillators
Semiconductor device measurement
Semiconductors
subthreshold
TECHNOLOGY
TEKNIKVETENSKAP
threshold element
Time Factors
Voltage
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Description
Summary:In this paper, a new, real-time reconfigurable perceptron circuit element is presented. A six-transistor version used as a threshold gate, having a fan-in of three, producing adequate outputs for threshold of T = 1,2 and 3 is demonstrated by chip measurements. Subthreshold operation for supply voltages in the range of 100-350 mV is shown. The circuit performs competitively with a standard static complimentary metal-oxide-semiconductor (CMOS) implementation when maximum speed and energy delay product are taken into account, when used in a ring oscillator. Functionality per transistor is, to our knowledge, the highest reported for a variety of comparable circuits not based on floating gate techniques. Statistical simulations predict probabilities for making working circuits under mismatch and process variations. The simulations, in 120-nm CMOS, also support discussions regarding lower limits to supply voltage and redundancy. A brief discussion on how the circuit may be exploited as a basic building block for future defect tolerant mixed signal circuits, as well as neural networks, exploiting redundancy, is included.
ISSN:1045-9227
2162-237X
1941-0093
1941-0093
2162-2388
DOI:10.1109/TNN.2007.912572