A 50 GHz Divide-by-4 Injection Lock Frequency Divider Using Matching Method

A fully integrated divide-by-4 frequency divider has been designed, fabricated, and measured in the standard bulk 0.18-m complementary metal-oxide semiconductor (CMOS) technology. A newly proposed matching technique was used to eliminate the unwanted low frequency mixing terms at the common node of...

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Bibliographic Details
Published in:IEEE microwave and wireless components letters 2008-05, Vol.18 (5), p.344-346
Main Authors: CHUANG, Mei-Chen, KUO, Jhe-Jia, WANG, Chi-Hsueh, WANG, Huei
Format: Article
Language:English
Subjects:
Applied sciences
Circuit properties
CMOS
CMOS process
CMOS technology
Complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs)
Design. Technologies. Operation analysis. Testing
Dividers
Division
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Frequency conversion
Frequency dividers
Frequency measurement
injection-locked oscillators
Integrated circuit measurements
Integrated circuit technology
Integrated circuits
Matching
Measurement standards
Metal oxide semiconductors
Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits
millimeter-wave circuits
MOS devices
Offsets
Oscillators, resonators, synthetizers
Phase noise
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Semiconductors
Signal convertors
Steady-state
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Description
Summary:A fully integrated divide-by-4 frequency divider has been designed, fabricated, and measured in the standard bulk 0.18-m complementary metal-oxide semiconductor (CMOS) technology. A newly proposed matching technique was used to eliminate the unwanted low frequency mixing terms at the common node of the circuit so as to achieve a high division ratio of 4. The frequency divider exhibits a measured operation range of 5 GHz from 45.9 to 50.9 GHz. It consumes a dc power of 7.56 mW at a 1.2 V supply in the steady state operation. The phase noise of the free running divider is 88.51 dBc/Hz at 1 MHz offset and the locked divider is 110.74 dBc/Hz at 1 MHz offset. The chip size is only 0.35 mm 0.5 mm including the pad frame. To our knowledge, this divider has the highest operation frequency to date among the high division ratio injection-lock type frequency dividers in commercial CMOS 0.18-m process.
ISSN:1531-1309
2771-957X
1558-1764
2771-9588
DOI:10.1109/LMWC.2008.922127