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Developments of SOI monolithic pixel detectors

A monolithic pixel detector with 0.2μm silicon-on-insulator (SOI) CMOS technology has been developed. It has both a thick high-resistivity sensor layer and thin LSI circuit layer on a single chip. Integration-type and counting-type pixel detectors are fabricated and tested with light and X-rays. The...

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Published in:Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment Accelerators, spectrometers, detectors and associated equipment, 2010-11, Vol.623 (1), p.186-188
Main Authors: Arai, Y., Miyoshi, T., Unno, Y., Tsuboyama, T., Terada, S., Ikegami, Y., Kohriki, T., Tauchi, K., Ikemoto, Y., Ichimiya, R., Ikeda, H., Hara, K., Miyake, H., Kochiyama, M., Sega, T., Hanagaki, K., Hirose, M., Hatsui, T., Kudo, T., Hirono, T., Yabashi, M., Furukawa, Y., Varner, G., Cooney, M., Hoedlmoser, H., Kennedy, J., Sahoo, H., Battaglia, M., Denes, P., Vu, C., Contarato, D., Giubilato, P., Glesener, L., Yarema, R., Lipton, R., Deptuch, G., Trimpl, M., Ohno, M., Fukuda, K., Komatsubara, H., Ida, J., Okihara, M., Hayashi, H., Kawai, Y., Ohtomo, A.
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Language:English
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Summary:A monolithic pixel detector with 0.2μm silicon-on-insulator (SOI) CMOS technology has been developed. It has both a thick high-resistivity sensor layer and thin LSI circuit layer on a single chip. Integration-type and counting-type pixel detectors are fabricated and tested with light and X-rays. The process is open to many researchers through Multi Project Wafer (MPW) runs operated by KEK. Further improvements of the fabrication technologies are also under investigation by using a buried p-well and 3D integration technologies.
ISSN:0168-9002
1872-9576
DOI:10.1016/j.nima.2010.02.190