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A Single-Event-Hardened Phase-Locked Loop Fabricated in 130 nm CMOS
A radiation-hardened-by-design phase-locked loop (PLL)-designed and fabricated in 130 nm CMOS-is shown to mitigate single-event transients (SETs). Two-photon-absorption (TPA) laser tests were used to characterize the error signatures of the PLL and to perform single-event upset (SEU) mapping of the...
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Published in: | IEEE transactions on nuclear science 2007-12, Vol.54 (6), p.2012-2020 |
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Main Authors: | , , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | A radiation-hardened-by-design phase-locked loop (PLL)-designed and fabricated in 130 nm CMOS-is shown to mitigate single-event transients (SETs). Two-photon-absorption (TPA) laser tests were used to characterize the error signatures of the PLL and to perform single-event upset (SEU) mapping of the PLL sub-components. Results show that a custom, voltage-based charge pump reduces the error response of the PLL over conventional designs by more than two orders of magnitude as measured by the number of erroneous PLL clock pulses following a single-event. Additionally, SEU mapping indicates a 99% reduction in the vulnerable area of the radiation-hardened-by-design (RHBD) charge pump over a conventional design. Furthermore, the TPA experiments highlight the importance of the voltage-controlled oscillator in the overall SET response of the PLL implementing the RHBD charge pump. |
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ISSN: | 0018-9499 1558-1578 |
DOI: | 10.1109/TNS.2007.908166 |