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Low power finite state machine synthesis using power-gating

Power-gating turns off the power supply of a portion of the circuit completely, resulting in total elimination of power consumption for that part. However, it also necessitates that the sub-circuit to be activated should be charged for some time before its activation. This critical issue can influen...

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Bibliographic Details
Published in:Integration (Amsterdam) 2011-06, Vol.44 (3), p.175-184
Main Authors: Nath Pradhan, Sambhu, Tilak Kumar, M., Chattopadhyay, Santanu
Format: Article
Language:English
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Summary:Power-gating turns off the power supply of a portion of the circuit completely, resulting in total elimination of power consumption for that part. However, it also necessitates that the sub-circuit to be activated should be charged for some time before its activation. This critical issue can influence the decomposition of a finite state machine (FSM) for its power gated implementation. In this paper we have presented a power-gating method that integrates FSM partitioning with state encoding, thus providing a total solution to the problem of power-aware FSM synthesis. It shows better results, in terms of dynamic and leakage power consumption, compared to the existing techniques reported in the literature.
ISSN:0167-9260
1872-7522
DOI:10.1016/j.vlsi.2011.03.003