Electrical and Interfacial Characterization of Atomic Layer Deposited High- \kappa Gate Dielectrics on GaAs for Advanced CMOS Devices

• Published in: IEEE transactions on electron devices 2007-08, Vol.54 (8), p.1831-1837
• Main Authors: Dalapati, G.K., Yi Tong, Wei-Yip Loh, Hoe Keat Mun, Byung Jin Cho
• Format: Article
• Language: English
• Subjects: Applied sciences; Atomic layer deposition (ALD); Design. Technologies. Operation analysis. Testing; Devices; Dielectric, amorphous and glass solid devices; Dielectrics; Dispersion; Electronics; Exact sciences and technology; frequency dispersion; GaAs MOS; Gallium arsenide; Gallium arsenides; Gates; Hafnium oxide; high- kappa dielectric; Integrated circuits; interface trap; Logic gates; Nuclear power generation; PDA; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Substrates; Surface cleaning; surface passivation; thermal stability
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2007.901261

In this paper, electrical and interfacial properties of MOS capacitors with atomic layer deposited (ALD) Al 2 O 3 , HfO 2 , and HfAlO gate dielectrics on sulfur-passivated (S-passivated) GaAs substrates were investigated. HfAlO on p-type GaAs has shown superior electrical properties over Al 2 O 3 or HfO 2 on GaAs, and it is attributed to the reduction of the Ga-O formation at the interfacial layer. HfAlO on p-type GaAs exhibits the best electrical properties after postdeposition annealing (PDA) at 500degC. It is found that PDA, at above 500degC, causes a significant amount of Ga and As out-diffusion into the high-k dielectric, which degrades the interface, as well as bulk high-k properties.