Heavy Ion Energy Effects in CMOS SRAMs

The impact of heavy ion energy on SEU and SEL in commercial and radiation-hardened CMOS SRAMs is explored. Provided the ion range is large enough for the ions to reach the sensitive device region, standard low-energy heavy ion testing is conservative with respect to high-energy heavy ions, at least...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2007-08, Vol.54 (4), p.889-893
Main Authors: Dodd, P.E., Schwank, J.R., Shaneyfelt, M.R., Ferlet-Cavrois, V., Paillet, P., Baggio, J., Hash, G.L., Felix, J.A., Hirose, K., Saito, H.
Format: Article
Language:English
Subjects:
Assurance
Circuit testing
CMOS
Devices
Energy (nuclear)
Error analysis
Hardness
Indirect ionization
Integrated circuit reliability
Ion accelerators
Ionization
Laboratories
Life estimation
Mathematical analysis
nuclear reactions
Radiation effects
radiation hardness assurance
Random access memory
single event effects
single event latchup
Single event upset
Thresholds
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Summary:The impact of heavy ion energy on SEU and SEL in commercial and radiation-hardened CMOS SRAMs is explored. Provided the ion range is large enough for the ions to reach the sensitive device region, standard low-energy heavy ion testing is conservative with respect to high-energy heavy ions, at least for LETs above the threshold for direct ionization-induced upsets. However, below the threshold LET for direct ionization-induced effects we find some differences between low- and high-energy tests. These differences are attributed to the effects of nuclear reaction-induced secondary particles. Implications for hardness assurance testing and error rate calculations are discussed.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2007.893425