Investigations regarding Through Silicon Via filling for 3D integration by Periodic Pulse Reverse plating with and without additives

In this contribution we show experimental investigations regarding Periodic Pulse Reverse (PPR) plating for the filling of Through Silicon Vias that are aimed for the use in 3D integration applications. The purpose of this method is to prevent the use of plating additives that induce high process co...

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Bibliographic Details
Published in:Microelectronic engineering 2011-05, Vol.88 (5), p.705-708
Main Authors: Hofmann, Lutz, Ecke, Ramona, Schulz, Stefan E., Gessner, Thomas
Format: Article
Language:English
Subjects:
Applied sciences
Copper
Cross-disciplinary physics: materials science
rheology
Design. Technologies. Operation analysis. Testing
Direct current
Electrochemical deposition (ECD)
Electrodeposition, electroplating
Electronics
Exact sciences and technology
Gain
Integrated circuits
Materials science
Methods of deposition of films and coatings
film growth and epitaxy
Microelectronic fabrication (materials and surfaces technology)
Microelectronics
Periodic Pulse Reverse (PPR) plating
Physics
Plating
Process control
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Silicon
Three dimensional
Through Silicon Via (TSV)
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Summary:In this contribution we show experimental investigations regarding Periodic Pulse Reverse (PPR) plating for the filling of Through Silicon Vias that are aimed for the use in 3D integration applications. The purpose of this method is to prevent the use of plating additives that induce high process complexity in terms of process control and high process costs due to the high consumption of those additives. We therefore compare the effect of PPR plating without additives to that effect of PPR plating with additives. In first results with non-optimized PPR plating we already show the large gain in step coverage during TSV filling compared to standard DC plating.
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2010.06.040