A 1.2-V 0.25- mu m clock output pixel architecture with wide dynamic range and self-offset cancellation

A 10T/pixel CMOS digital pixel sensor with clock count output, ultra low supply voltage, and wide dynamic range is presented. The pixel fabricated by a standard 0.25- mu m CMOS logic process comprises a reset transistor, a photo-diode, a comparator, and an inverter with pixel size of 9.49.4 mu m sup...

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Bibliographic Details
Published in:IEEE sensors journal 2006-04, Vol.6 (2)
Main Authors: Lai, Cheng-Hsiao, King, Ya-Chin, Huang, Shi-Yu
Format: Article
Language:English
Subjects:
Clocks
CMOS
Dynamic range
Electric potential
Logic
Pixels
Sensors
Voltage
Online Access:Get full text
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Summary:A 10T/pixel CMOS digital pixel sensor with clock count output, ultra low supply voltage, and wide dynamic range is presented. The pixel fabricated by a standard 0.25- mu m CMOS logic process comprises a reset transistor, a photo-diode, a comparator, and an inverter with pixel size of 9.49.4 mu m super(2) and 24% fill factor. The amplified logarithmic output response similar to the light response of human eye is demonstrated in this work. The pixel can operate at a supply voltage as low as 1.2 V without affecting its output characteristics. The dynamic range of this cell limited by either the subsequent analog-to-digital circuit resolution or the rising and falling time of output clock is higher than 90 dB with an 8-bit resolution.
ISSN:1530-437X
DOI:10.1109/JSEN.2006.870144