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Test structure design considerations for RF-CV measurements on leaky dielectrics
We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extr...
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Published in: | IEEE transactions on semiconductor manufacturing 2004-05, Vol.17 (2), p.150-154 |
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Main Authors: | , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Citations: | Items that this one cites Items that cite this one |
Online Access: | Get full text |
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Summary: | We present an MOS capacitance-voltage measurement methodology that, contrary to present methods, is highly robust against gate leakage current densities up to 1000 A/cm/sup 2/. The methodology features specially designed RF test structures and RF measurement frequencies. It allows MOS parameter extraction in the full range of accumulation, depletion, and inversion. |
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ISSN: | 0894-6507 1558-2345 |
DOI: | 10.1109/TSM.2004.826998 |