Locating disturbances in semiconductor manufacturing with stepwise regression

• Published in: IEEE transactions on semiconductor manufacturing 2005-08, Vol.18 (3), p.458-468
• Main Authors: McCray, A.T., McNames, J., Abercrombie, D.
• Format: Article
• Language: English
• Subjects: Analysis of variance; Analysis of variance (ANOVA); Applied sciences; Circuit testing; Computer simulation; Disturbances; Electric variables measurement; Electronics; Exact sciences and technology; False alarms; fault isolation; Large scale integration; Logic; Manufacturing processes; Microelectronic fabrication (materials and surfaces technology); Monitoring; Monte Carlo methods; Positioning; Process control; Regression; Scheduling algorithm; Semiconductor device manufacture; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; semiconductor manufacturing; Semiconductors; statistical process control and monitoring; stepwise regression; variance reduction; variance source isolation
• ISSN: 0894-6507; 1558-2345
• DOI: 10.1109/TSM.2005.852118

The ability to locate disturbances in semiconductor manufacturing processes is critical to developing and maintaining a high yield. Analysis of variance (ANOVA), the best current practice for this problem, consists of conducting a series of hypothesis tests at each individual processing step. This approach can lead to excessive false alarms and limited sensitivity when the process contains more than one disturbance. We describe how this problem can be framed as a subset selection problem and propose two new methods based on stepwise regression. Results of over 90 000 Monte Carlo simulations suggest that these new SWR methods locate disturbances with fewer false positives and false negatives than ANOVA. This means process engineers will spend less time responding to false alarms and will be able to locate real disturbances more often.