An 8-Gb/s/pin simultaneously bidirectional transceiver in 0.35-μm CMOS

• Published in: IEEE journal of solid-state circuits 2004-11, Vol.39 (11), p.1894-1908
• Main Authors: DROST, Robert J, WOOLEY, Bruce A
• Format: Article
• Language: English
• Subjects: Applied sciences; Bidirectional; Cancellation; Circuit properties; Circuits; CMOS; Digital; Electric potential; Electric, optical and optoelectronic circuits; Electronics; Exact sciences and technology; Microwave circuits, microwave integrated circuits, microwave transmission lines, submillimeter wave circuits; Radiocommunications; Telecommunications; Telecommunications and information theory; Transceivers; Transmitters. Receivers; Voltage
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2004.835837

This paper presents architecture, circuits, and test results for a single-ended, simultaneously bidirectional interface capable of a total throughput of 8 Gb/s per pin. The interface addresses noise reduction challenges by utilizing a pseudodifferential reference with noise immunity approaching that of a fully differential reference. The transmitter supports on-chip termination, predistortion, and low-skew near-end outgoing signal echo cancellation. The receiver's sense amplifier evaluates the average of two differential input signals without use of analog components and utilizes imbalanced charge injection to compensate for offset voltages. A test chip integrated in a 0.35- mu m digital CMOS technology uses the proposed techniques to implement an 8-bit wide single-ended voltage-mode simultaneous bidirectional interface and achieves a performance of 8 Gb/s per pin.