Single-event upset in highly scaled commercial silicon-on-insulator PowerPC microprocessors

Single-event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes and core voltages. The results are compared with results for similar devices with bulk substrates. The cross sections of the SOI processors are lower t...

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Bibliographic Details
Published in:IEEE transactions on nuclear science 2005-10, Vol.52 (5), p.1524-1529
Main Authors: Irom, F., Farmanesh, F.H.
Format: Article
Language:English
Subjects:
Charge
Collection
Cross sections
Cyclotron
Degradation
Devices
Electric potential
heavy ion
Manufacturing processes
Microprocessors
NASA
Processors
Silicon on insulator technology
silicon-on-insulator (SOI)
Single event upset
Space technology
Substrates
Testing
Voltage
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Summary:Single-event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes and core voltages. The results are compared with results for similar devices with bulk substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold is about the same, even though the charge collections depth is more than an order of magnitude smaller in the SOI devices. The scaling of the cross section with reduction of feature size and core voltage dependence for SOI microprocessors is discussed.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2005.855816