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Parametric timing analysis and its application to dynamic voltage scaling
Embedded systems with real-time constraints depend on a priori knowledge of worst-case execution times (WCETs) to determine if tasks meet deadlines. Static timing analysis derives bounds on WCETs but requires statically known loop bounds.
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Published in: | ACM transactions on embedded computing systems 2010-12, Vol.10 (2) |
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Main Authors: | , , , , , , |
Format: | Article |
Language: | English |
Subjects: | |
Online Access: | Get full text |
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Summary: | Embedded systems with real-time constraints depend on a priori knowledge of worst-case execution times (WCETs) to determine if tasks meet deadlines. Static timing analysis derives bounds on WCETs but requires statically known loop bounds. |
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ISSN: | 1539-9087 |
DOI: | 10.1145/780732.780771 |