Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS

• Published in: IEEE transaction on neural networks and learning systems 2003-09, Vol.14 (5), p.1244-1256
• Main Authors: Aunet, S., Berg, Y., Saether, T.
• Format: Article
• Language: English
• Subjects: Chips; Circuit testing; CMOS; Computer simulation; Current measurement; Design methodology; Electric circuits; Laboratories; Mathematical analysis; Mathematical models; Measurement standards; Neural networks; Power measurement; Power supplies; Semiconductor device measurement; Thresholds; Wiring
• ISSN: 1045-9227; 2162-237X; 1941-0093; 2162-2388
• DOI: 10.1109/TNN.2003.816351

This paper describes using theory, computer simulations, and laboratory measurements a new class of real-time reconfigurable UV-programmable floating-gate (FGUVMOS) linear threshold elements operating with current levels typically in the pA to /spl mu/A range, in standard double-poly 0.6 /spl mu/m CMOS, providing an ultra low-power potential. A new design method based on using the same basic two-MOSFET circuits extensively is proposed, meant for improving the opportunities to make larger FGUVMOS circuitry than previously reported. By using the same basic circuitry extensively, instead of different circuitry for basic digital functions, the goal is to ease UV-programming and test and save circuitry on chip and I-O-pads. Matching of circuitry should also be improved by using this approach. Compact circuitry can be made, reducing wiring and active components compared to previously reported FGUVMOS. 2-MOSFET circuits able to implement CARRY, NOR, NAND, and INVERT functions are demonstrated by measurements on chip, working with power supply voltages ranging from 800 mV down to 93 mV. The basic linear threshold element proposed is considered as a potential basic building block in neural networks.