A low-voltage low-power sigma-delta modulator for broadband analog-to-digital conversion

A cascade of sigma-delta modulator stages that employ a feedforward architecture to reduce the signal ranges required at the integrator inputs and outputs has been used to implement a broadband, high-resolution oversampling CMOS analog-to-digital converter capable of operating from low-supply voltag...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of solid-state circuits 2005-09, Vol.40 (9), p.1855-1864
Main Authors: KiYoung Nam, Sang-Min Lee, Su, D.K., Wooley, B.A.
Format: Article
Language:English
Subjects:
Analog circuits
Analog to digital conversion
Analog-digital conversion
Applied sciences
Architecture
Bandwidth
Broadband
Cascades
Circuit properties
CMOS
CMOS analog integrated circuits
CMOS technology
Delta-sigma modulation
Design. Technologies. Operation analysis. Testing
Dielectric, amorphous and glass solid devices
Dynamic range
Dynamic voltage scaling
Electric, optical and optoelectronic circuits
Electronic circuits
Electronics
Exact sciences and technology
Feedforward
Integrated circuit technology
Integrated circuits
low-power electronics
low-voltage analog circuits
mixed analog-digital integrated circuits
Modulators
oversampling A/D converters
Power dissipation
power minimization
Prototypes
Sampling
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
sigma-delta modulation
Signal convertors
switched-capacitor circuits
Citations: Items that this one cites
Items that cite this one
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:A cascade of sigma-delta modulator stages that employ a feedforward architecture to reduce the signal ranges required at the integrator inputs and outputs has been used to implement a broadband, high-resolution oversampling CMOS analog-to-digital converter capable of operating from low-supply voltages. An experimental prototype of the proposed architecture has been integrated in a 0.25-/spl mu/m CMOS technology and operates from an analog supply of only 1.2 V. At a sampling rate of 40 MSamples/sec, it achieves a dynamic range of 96 dB for a 1.25-MHz signal bandwidth. The analog power dissipation is 44 mW.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2005.852161