Evaluating compiler technology for control-flow optimizations for multimedia extension architectures

This paper addresses how to automatically generate code for multimedia extension architectures in the presence of conditionals. We evaluate the costs and benefits of exploiting branches on the aggregate condition codes associated with the fields of a superword (an aggregate object larger than a mach...

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Bibliographic Details
Published in:Microprocessors and microsystems 2009-06, Vol.33 (4), p.235-243
Main Authors: Shin, Jaewook, Hall, Mary W., Chame, Jacqueline
Format: Article
Language:English
Subjects:
Automatic vectorization
Branch-on-superword-condition-code (BOSCC)
Control flow
Multimedia extension
SIMD compiler
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Summary:This paper addresses how to automatically generate code for multimedia extension architectures in the presence of conditionals. We evaluate the costs and benefits of exploiting branches on the aggregate condition codes associated with the fields of a superword (an aggregate object larger than a machine word) such as the branch-on-any instruction of the AltiVec. Branch-on-superword-condition-codes (BOSCC) instructions allow fast detection of aggregate conditions, an optimization opportunity often found in multimedia applications. This paper presents compiler analyses and techniques for generating efficient parallel code using BOSCC instructions. We evaluate our approach, which has been implemented in the SUIF compiler, through a set of experiments with multimedia benchmarks, and compare it with the default approach previously implemented in our compiler. Our experimental results show that using BOSCC instructions can result in better performance for applications where the aggregate condition codes of a superword often evaluate to the same value.
ISSN:0141-9331
1872-9436
DOI:10.1016/j.micpro.2009.02.002