Gallium arsenide heterojunction transistor integrated circuits for a limiting amplifier and synchronizer

Design of gallium arsenide heterojunction transistor integrated circuits for a limiting amplifier and synchronizer is considered. A novel circuitry of amplifying stages is proposed. Computer simulation is performed. Devices capable of 12.5-Gbps data transmission speed are investigated experimentally...

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Bibliographic Details
Published in:Journal of communications technology & electronics 2007-07, Vol.52 (7), p.826-834
Main Author: Timoshenkov, V P
Format: Article
Language:English
Subjects:
Amplifiers
Computer simulation
Constraining
Gallium arsenide
Heterojunctions
Integrated circuits
Semiconductor devices
Synchronizers
Transistors
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Summary:Design of gallium arsenide heterojunction transistor integrated circuits for a limiting amplifier and synchronizer is considered. A novel circuitry of amplifying stages is proposed. Computer simulation is performed. Devices capable of 12.5-Gbps data transmission speed are investigated experimentally. Good agreement of experimental and simulation results is obtained.[PUBLICATION ABSTRACT]
ISSN:1064-2269
1555-6557
DOI:10.1134/S1064226907070169