An iterative cutting procedure for determining the optimal wafer exposure pattern

Conventionally, people focus on defect reduction to improve yield rate. Little research has been done to deal with the problem of optimizing wafer exposure patterns. This paper develops a computer-based procedure to maximize the number of dies possibly produced from a wafer. A program has been devel...

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Bibliographic Details
Published in:IEEE transactions on semiconductor manufacturing 1999-08, Vol.12 (3), p.375-377
Main Authors: CHIEN, C.-F, HSU, S.-C, CHEN, C.-P
Format: Article
Language:English
Subjects:
Applied sciences
Costs
Councils
Cutting
Electronics
Exact sciences and technology
Expert systems
Fabrication
Factories
Industrial engineering
Investments
Iterative methods
Microelectronic fabrication (materials and surfaces technology)
Optimization
Optimization methods
Plants
Production facilities
Sawing
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Semiconductors
Shape
Upper bound
Wafers
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Description
Summary:Conventionally, people focus on defect reduction to improve yield rate. Little research has been done to deal with the problem of optimizing wafer exposure patterns. This paper develops a computer-based procedure to maximize the number of dies possibly produced from a wafer. A program has been developed and implemented in a 6-in wafer fabrication factory in Taiwan. The results validate the practical viability of the proposed procedure.
ISSN:0894-6507
1558-2345
DOI:10.1109/66.778206