Gate leakage behavior of source/drain-to-gate non-overlapped MOSFET structure

In this paper, novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high- k spacer structure has been demonstrated to reduce the gate leakage current for the first time. The gate leakage behavior of novel MOSFET structure has been investigated with help of compact analytical model and...

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Bibliographic Details
Published in:Journal of computational electronics 2011-06, Vol.10 (1-2), p.222-228
Main Authors: Rana, Ashwani K., Chand, Narottam, Kapoor, Vinod
Format: Article
Language:English
Subjects:
Applied sciences
Current leakage
Drains
Electric fields
Electrical Engineering
Electronics
Engineering
Exact sciences and technology
Gates
Leakage
Leakage current
Mathematical and Computational Engineering
Mathematical and Computational Physics
Mechanical Engineering
Molecular electronics, nanoelectronics
MOSFETs
Nanostructure
Optical and Electronic Materials
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Spacers
Theoretical
Transistors
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Summary:In this paper, novel nanoscale MOSFET with Source/Drain-to-Gate Non-overlapped and high- k spacer structure has been demonstrated to reduce the gate leakage current for the first time. The gate leakage behavior of novel MOSFET structure has been investigated with help of compact analytical model and Sentaurus Simulation. Fringing gate electric field through the dielectric spacer induces inversion layer in the non-overlap region to act as extended source/drain region. It is found that optimal source/drain-to-gate non-overlapped and high- k spacer structure has reduced the gate leakage current to great extent as compared to those of an overlapped structure. Further, the proposed structure had improved off current, subthreshold slope and drain induced barrier lowering characteristic with a slight degradation in source/drain series resistance and effective gate capacitance.
ISSN:1569-8025
1572-8137
DOI:10.1007/s10825-011-0357-8