Scaling analysis of a neocortex inspired cognitive model on the Cray XD1

This paper presents the implementation and scaling of a neocortex inspired cognitive model on a Cray XD1. Both software and reconfigurable logic based FPGA implementations of the model are examined. This model belongs to a new class of biologically inspired cognitive models. Large scale versions of...

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Bibliographic Details
Published in:The Journal of supercomputing 2009, Vol.47 (1), p.21-43
Main Authors: Rice, Kenneth L., Taha, Tarek M., Vutsinas, Christopher N.
Format: Article
Language:English
Subjects:
Applied sciences
Compilers
Computational efficiency
Computer programs
Computer Science
Computer science
control theory
systems
Computer systems and distributed systems. User interface
Electronics
Estimates
Exact sciences and technology
Field programmable gate arrays
Gain
Hardware
Integrated circuits
Integrated circuits by function (including memories and processors)
Interpreters
Networks
Processor Architectures
Programming Languages
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Software
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Summary:This paper presents the implementation and scaling of a neocortex inspired cognitive model on a Cray XD1. Both software and reconfigurable logic based FPGA implementations of the model are examined. This model belongs to a new class of biologically inspired cognitive models. Large scale versions of these models have the potential for significantly stronger inference capabilities than current conventional computing systems. These models have large amounts of parallelism and simple computations, thus allowing highly efficient hardware implementations. As a result, hardware-acceleration of these models can produce significant speedups over fully software implementations. Parallel software and hardware-accelerated implementations of such a model are investigated for networks of varying complexity. A scaling analysis of these networks is presented and utilized to estimate the throughput of both hardware-accelerated and software implementations of larger networks that utilize the full resources of the Cray XD1. Our results indicate that hardware-acceleration can provide average throughput gains of 75 times over software-only implementations of the networks we examined on this system.
ISSN:0920-8542
1573-0484
DOI:10.1007/s11227-008-0195-z