Copper Stud Bumping for Flip-Chip Applications

Approaching 10% of the entire interconnection market, flip-chip devices are one of the highest growth segments of semiconductor assembly. However, higher assembly cost has hampered flip-chip growth in consumer electronics, limiting its adoption to applications with requirements for a smaller footpri...

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Bibliographic Details
Published in:Semiconductor International 2006-06, Vol.29 (6), p.SP11
Main Authors: Levine, Lee, Chaudhuri, Arun, Stepniak, Frank
Format: Article
Language:English
Subjects:
Aluminum
Capital costs
Copper
Failure
Gold
Integrated circuits
Nickel
Plating
Semiconductors
Shear strength
Soldering
Thermal cycling
Zinc
Online Access:Get full text
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Summary:Approaching 10% of the entire interconnection market, flip-chip devices are one of the highest growth segments of semiconductor assembly. However, higher assembly cost has hampered flip-chip growth in consumer electronics, limiting its adoption to applications with requirements for a smaller footprint (cell phones) or better electrical performance (graphics processors). Cost reduction efforts will play an important role in achieving increased adoption of this technology. Often overlooked, the underbump metallization plays a critical role in joint integrity as an intermediate layer providing a solderable surface while preventing interdiffusion to the IC. The copper stud flip-chip process has demonstrated feasibility as a low-cost alternative to sputter/stencil or electroless nickel/gold processes. Although it did not initially meet the most stringent reliability criteria, further work is expected to achieve even these high standards. Copper stud bumping can, potentially, provide the lowest-cost flip-chip process for devices with low to medium I/O density, such as DRAM and automotive applications.
ISSN:0163-3767