Development and Validation of a Spike Detection and Classification Algorithm Aimed at Implementation on Hardware Devices

Neurons cultured in vitro on MicroElectrode Array (MEA) devices connect to each other, forming a network. To study electrophysiological activity and long term plasticity effects, long period recording and spike sorter methods are needed. Therefore, on-line and real time analysis, optimization of mem...

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Bibliographic Details
Published in:Computational Intelligence and Neuroscience 2010, Vol.2010 (2010), p.220-234
Main Authors: Biffi, E., Ghezzi, D., Pedrocchi, A., Ferrigno, G.
Format: Article
Language:English
Subjects:
Acquisitions & mergers
Action Potentials - physiology
Algorithms
Analysis
Animals
Cell Culture Techniques - instrumentation
Cell Culture Techniques - methods
Cells, Cultured
Computer Simulation
Digital integrated circuits
Electrodes
Electrophysiology - instrumentation
Electrophysiology - methods
Equipment Design
Hippocampus - cytology
Hippocampus - physiology
Methods
Mice
Microelectrodes
Nerve Net - cytology
Nerve Net - physiology
Neuronal Plasticity - physiology
Neurons - cytology
Neurons - physiology
Noise
Principal components analysis
Signal Processing, Computer-Assisted - instrumentation
Software Design
Standard deviation
Studies
Synaptic Transmission - physiology
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Summary:Neurons cultured in vitro on MicroElectrode Array (MEA) devices connect to each other, forming a network. To study electrophysiological activity and long term plasticity effects, long period recording and spike sorter methods are needed. Therefore, on-line and real time analysis, optimization of memory use and data transmission rate improvement become necessary. We developed an algorithm for amplitude-threshold spikes detection, whose performances were verified with (a) statistical analysis on both simulated and real signal and (b) Big O Notation. Moreover, we developed a PCA-hierarchical classifier, evaluated on simulated and real signal. Finally we proposed a spike detection hardware design on FPGA, whose feasibility was verified in terms of CLBs number, memory occupation and temporal requirements; once realized, it will be able to execute on-line detection and real time waveform analysis, reducing data storage problems.
ISSN:1687-5265
1687-5273
DOI:10.1155/2010/659050