High-Gain Metasurface in Polyimide On-Chip Antenna Based on CRLH-TL for Sub-Terahertz Integrated Circuits

• Published in: Scientific reports 2020-03, Vol.10 (1), p.4298-4298, Article 4298
• Main Authors: Alibakhshikenari, Mohammad, Virdee, Bal S., See, Chan H., Abd-Alhameed, Raed A., Falcone, Francisco, Limiti, Ernesto
• Format: Article
• Language: English
• Subjects: 639/166/987; 639/301/1005/1007; Aluminum; Antennas; Handedness; Humanities and Social Sciences; Integrated circuits; multidisciplinary; Science; Science (multidisciplinary)
• ISSN: 2045-2322; 2045-2322
• DOI: 10.1038/s41598-020-61099-8

This paper presents a novel on-chip antenna using standard CMOS-technology based on metasurface implemented on two-layers polyimide substrates with a thickness of 500 μ m. The aluminium ground-plane with thickness of 3 μ m is sandwiched between the two-layers. Concentric dielectric-rings are etched in the ground-plane under the radiation patches implemented on the top-layer. The radiation patches comprise concentric metal-rings that are arranged in a 3 × 3 matrix. The antennas are excited by coupling electromagnetic energy through the gaps of the concentric dielectric-rings in the ground-plane using a microstrip feedline created on the bottom polyimide-layer. The open-ended feedline is split in three-branches that are aligned under the radiation elements to couple the maximum energy. In this structure, the concentric metal-rings essentially act as series left-handed capacitances C L that extend the effective aperture area of the antenna without affecting its dimensions, and the concentric dielectric rings etched in the ground-plane act as shunt left-handed inductors L L , which suppress the surface-waves and reduce the substrates losses that leads to improved bandwidth and radiation properties. The overall structure behaves like a metasurface that is shown to exhibit a very large bandwidth of 0.350–0.385 THz with an average radiation gain and efficiency of 8.15dBi and 65.71%, respectively. It has dimensions of 6 × 6 × 1 mm 3 that makes it suitable for on-chip implementation.