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Organic-semiconductor nanoarchitectonics for multi-valued logic circuits with ideal transfer characteristics
We introduce a rational design approach to high-performance multi-valued logic circuits. Taking an organic-based ternary inverter as a model system, robust input parameters to a two-dimensional finite-element solver are estimated. Physical simulations on key structural, materials, and interface para...
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Published in: | Journal of materials chemistry. C, Materials for optical and electronic devices Materials for optical and electronic devices, 2021-11, Vol.9 (43), p.15415-15421 |
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cites | cdi_FETCH-LOGICAL-c281t-75d8d046bbf41bdac8d804f6f772ac48f9b5426d69a1c6c4e95ff3647d9f13df3 |
container_end_page | 15421 |
container_issue | 43 |
container_start_page | 15415 |
container_title | Journal of materials chemistry. C, Materials for optical and electronic devices |
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creator | Jo, Sun-Woo Choi, Jungsoo Hayakawa, Ryoma Wakayama, Yutaka Jung, Sungyeop Kim, Chang-Hyun |
description | We introduce a rational design approach to high-performance multi-valued logic circuits. Taking an organic-based ternary inverter as a model system, robust input parameters to a two-dimensional finite-element solver are estimated. Physical simulations on key structural, materials, and interface parameters are then carried out, focusing on a technologically relevant input-output voltage relationship. Junction-length scaling, semiconductor film thickness, carrier mobility, and injection energy are found to be critical to logic-transfer behavior, revealing a possible optimized state with all essential operating points simultaneously secured.
A nanoarchitectonics approach to high-performance organic multi-valued logic circuits is proposed. |
doi_str_mv | 10.1039/d1tc04366h |
format | article |
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A nanoarchitectonics approach to high-performance organic multi-valued logic circuits is proposed.</description><subject>Carrier mobility</subject><subject>Circuit design</subject><subject>Film thickness</subject><subject>Finite element method</subject><subject>Logic circuits</subject><subject>Multivalued logic</subject><subject>Parameter robustness</subject><subject>Two dimensional models</subject><issn>2050-7526</issn><issn>2050-7534</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><recordid>eNpFkM9LwzAUx4MoOOYu3oWAN6GaNGnaHGU6Jwx2meeSviRrRtfOJFX8741O5ru8Xx--7_FF6JqSe0qYfNA0AuFMiPYMTXJSkKwsGD8_1bm4RLMQdiRFRUUl5AR1a79VvYMsmL2DodcjxMHjXvWD8tC6aFKf9gHbNN6PXXTZh-pGo3E3bB1gcB5GFwP-dLHFThvV4ehVH6zxGFrlFUTjXYhJ4wpdWNUFM_vLU_S2eN7Ml9lq_fI6f1xlkFc0pk91pQkXTWM5bbSCSleEW2HLMlfAKyubgudCC6koCOBGFtYywUstLWXasim6Peoe_PA-mhDr3TD6Pp2s80IWkjEqRKLujhT4IQRvbH3wbq_8V01J_WNo_UQ3819Dlwm-OcI-wIn7N5x9Awl1dU4</recordid><startdate>20211111</startdate><enddate>20211111</enddate><creator>Jo, Sun-Woo</creator><creator>Choi, Jungsoo</creator><creator>Hayakawa, Ryoma</creator><creator>Wakayama, Yutaka</creator><creator>Jung, Sungyeop</creator><creator>Kim, Chang-Hyun</creator><general>Royal Society of Chemistry</general><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>7U5</scope><scope>8FD</scope><scope>L7M</scope><orcidid>https://orcid.org/0000-0002-0801-8884</orcidid><orcidid>https://orcid.org/0000-0002-7112-6335</orcidid><orcidid>https://orcid.org/0000-0002-1442-8230</orcidid><orcidid>https://orcid.org/0000-0003-2669-1797</orcidid></search><sort><creationdate>20211111</creationdate><title>Organic-semiconductor nanoarchitectonics for multi-valued logic circuits with ideal transfer characteristics</title><author>Jo, Sun-Woo ; Choi, Jungsoo ; Hayakawa, Ryoma ; Wakayama, Yutaka ; Jung, Sungyeop ; Kim, Chang-Hyun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c281t-75d8d046bbf41bdac8d804f6f772ac48f9b5426d69a1c6c4e95ff3647d9f13df3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Carrier mobility</topic><topic>Circuit design</topic><topic>Film thickness</topic><topic>Finite element method</topic><topic>Logic circuits</topic><topic>Multivalued logic</topic><topic>Parameter robustness</topic><topic>Two dimensional models</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Jo, Sun-Woo</creatorcontrib><creatorcontrib>Choi, Jungsoo</creatorcontrib><creatorcontrib>Hayakawa, Ryoma</creatorcontrib><creatorcontrib>Wakayama, Yutaka</creatorcontrib><creatorcontrib>Jung, Sungyeop</creatorcontrib><creatorcontrib>Kim, Chang-Hyun</creatorcontrib><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><jtitle>Journal of materials chemistry. C, Materials for optical and electronic devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Jo, Sun-Woo</au><au>Choi, Jungsoo</au><au>Hayakawa, Ryoma</au><au>Wakayama, Yutaka</au><au>Jung, Sungyeop</au><au>Kim, Chang-Hyun</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Organic-semiconductor nanoarchitectonics for multi-valued logic circuits with ideal transfer characteristics</atitle><jtitle>Journal of materials chemistry. C, Materials for optical and electronic devices</jtitle><date>2021-11-11</date><risdate>2021</risdate><volume>9</volume><issue>43</issue><spage>15415</spage><epage>15421</epage><pages>15415-15421</pages><issn>2050-7526</issn><eissn>2050-7534</eissn><abstract>We introduce a rational design approach to high-performance multi-valued logic circuits. Taking an organic-based ternary inverter as a model system, robust input parameters to a two-dimensional finite-element solver are estimated. Physical simulations on key structural, materials, and interface parameters are then carried out, focusing on a technologically relevant input-output voltage relationship. Junction-length scaling, semiconductor film thickness, carrier mobility, and injection energy are found to be critical to logic-transfer behavior, revealing a possible optimized state with all essential operating points simultaneously secured.
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source | Royal Society of Chemistry:Jisc Collections:Royal Society of Chemistry Read and Publish 2022-2024 (reading list) |
subjects | Carrier mobility Circuit design Film thickness Finite element method Logic circuits Multivalued logic Parameter robustness Two dimensional models |
title | Organic-semiconductor nanoarchitectonics for multi-valued logic circuits with ideal transfer characteristics |
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