Threshold voltage tuning of IGZTO thin-film transistors deposited by RF sputtering for high-resolution flexible displays using deep ultraviolet light

• Published in: Journal of materials chemistry. C, Materials for optical and electronic devices Materials for optical and electronic devices, 2023-06, Vol.11 (23), p.7793-781
• Main Authors: Park, In Pyo, Hwang, Bu Kyeong, Lee, Bo Ram, Song, Pung Keun, Heo, Soo Won
• Format: Article
• Language: English
• Subjects: Amorphous semiconductors; Annealing; Bias; Displays; Gallium; Hall effect; Heat treatment; High resolution; High temperature; Low temperature; Photoelectrons; Semiconductor devices; Stability analysis; Thin film transistors; Thin films; Threshold voltage; Tin; Tin oxides; Transmission lines; Tuning; Ultraviolet radiation
• ISSN: 2050-7526; 2050-7534
• DOI: 10.1039/d3tc01379k

In this study, an indium gallium zinc tin oxide (IGZTO, In : Ga : Zn : Sn = 4 : 1 : 4 : 1) thin-film transistor (TFT) applied with deep ultraviolet (DUV) and thermal dual treatment (DTT) was fabricated for low-temperature activation of amorphous oxide semiconductors (AOSs). It was possible to tune the threshold voltage ( V th ) and improve mobility by adjusting the DUV irradiation time and thermal treatment temperature. Also, by adjusting V th close to 0 V, it was possible to improve the device operation method from depletion mode to enhancement mode. V th is tuned by adjusting the oxygen vacancy (Vo) and interface trap density in the thin film through DTT. The IGZTO TFT applied with DTT at 250 °C for 60 min showed a mobility of 47.17 cm 2 V −1 s −1 and a V th of −3 V. X-ray photoelectron spectroscopy and transmission line method analysis confirmed that DTT effectively reduces the defect of IGZTO thin film. Moreover, Hall measurement analysis confirmed that DTT was effective in improving the V th negative shift of TFT by suppressing the generation of excess carriers. Electrical stability was evaluated through negative bias stress (NBS) and positive bias stress (PBS). Although the DTT device annealed at a relatively low temperature (250 °C), it achieved bias stress stability comparable to that produced by the existing, high-temperature annealing (350 °C) process. Therefore, DTT is expected to be introduced as a low-temperature process for next-generation high-resolution flexible displays by enabling V th tuning while improving the mobility of IGZTO TFTs through the introduction of DTT. Development of DUV/Thermal dual treatment (DTT) process to improve the electrical performance and stability of oxide thin film transistors while efficiently controlling the threshold voltage of the device.