Numerical and experimental characterization of 4 H -silicon carbide lateral metal-oxide-semiconductor field-effect transistor

• Published in: Journal of applied physics 2006-08, Vol.100 (4), p.044515-044515-8
• Main Authors: Potbhare, Siddharth, Goldsman, Neil, Pennington, Gary, Lelis, Aivars, McGarrity, James M.
• Format: Article
• ISSN: 0021-8979; 1089-7550
• DOI: 10.1063/1.2335967

Combined simulation and experimental analyses are performed to characterize the 4 H -silicon carbide (SiC) lateral metal-oxide-semiconductor field-effect transistor (MOSFET). Using a quasi-two-dimensional depth dependent Coulomb mobility model for scattering due to interface and oxide charge, along with existing models for other scattering mechanisms, and an in-house drift diffusion device simulator tailored for SiC MOSFETs, we have extracted values for interface trap density of states for 4 H - Si C MOSFETs. Characterization shows that the interface trapped charge in 4 H - Si C MOSFETs is responsible for mobility degradation and reduction in mobile inversion charge, and therefore reduced current. Its effect on mobility degradation decreases at higher gate voltages due to increased screening. Our results show that at high gate voltages, surface roughness plays the major role in surface mobility degradation in 4 H - Si C MOSFETs. Results indicate that due to high Coulomb scattering near the interface, current density is maximum a few nanometers away from the surface. The model indicates overall mobility values of approximately 20 cm 2 ∕ V s at the interface, and increasing to approximately 250 cm 2 ∕ V s near the bottom of the inversion layer. Simulations predict that tenfold reduction in interface and fixed oxide charge density would give rise to very favorable device characteristics.