Quantification of metal oxide semiconductor field effect transistor device reliability with low- V t lanthanum-incorporated high permittivity dielectrics

• Published in: Journal of applied physics 2009-12, Vol.106 (11), p.114504-114504-7
• Main Authors: O'Sullivan, B. J., Aoulaiche, M., Cho, M. J., Kauerauf, T., Degraeve, R., Okawa, H., Schram, T., Hoffmann, T. Y., Groeseneken, G., Biesemans, S., Nakabayashi, T., Ikeda, A., Niwa, M.
• Format: Article
• Language: English
• ISSN: 0021-8979; 1089-7550
• DOI: 10.1063/1.3262620

Results from an extensive reliability characterization of HfLaSiO(N) devices, with TaN gate electrodes, are reported. It is shown that the effect of the lanthanum, initially deposited as La 2 O 3 , on a SiO 2 / HfSiO ( N ) stack, permeates the Si / SiO 2 interface. A lower midgap interface state density is observed at this interface, but increased densities are seen towards the band edges. The presence of lanthanum in the dielectric results in defects in the interface layer and in the high- κ dielectric. A profile of defects in the gate stack is suggested, inferred from a combination of electrical measurements. From the location of the defects, it is argued that the reliability of lanthanum-incorporated devices is not compromised by its presence, thus enabling a reliable route to V t tuning of n-type metal oxide semiconductor devices.