Area-efficient all-digital pulse-shrinking smart temperature sensor with improved accuracy and resolution

• Published in: Review of scientific instruments 2018-12, Vol.89 (12), p.125002-125002
• Main Authors: Chen, Chun-Chi, Hwang, Chorng-Sii, Chu, Che-Shun
• Format: Article
• Language: English
• Subjects: Accuracy; CMOS; Delay; Delay lines; Error detection; High resolution; Metal oxide semiconductors; Metal oxides; Scientific apparatus & instruments; Semiconductor devices; Sensors; Temperature; Temperature sensors; Transistors
• ISSN: 0034-6748; 1089-7623
• DOI: 10.1063/1.5057426

An all-digital CMOS (Complementary Metal-Oxide Semiconductor) pulse-shrinking smart temperature sensor (PSSTS) is proposed to deliver the merits of area efficiency, improved accuracy, and high resolution. First, an inverter-based temperature-sensing delay line generates a pulse with a width proportional to absolute temperature (PTAT). Then, a pulse-shrinking delay line (PSDL) with a pulse-mixing scheme (PMS) measures the PTAT pulse through pulse shrinking. The two delay lines become area efficient when the channel length of transistors is long. Conventionally, the area-efficient PSDL decreases the time resolution. Thus, the all-digital PMS considerably enhances the time resolution and achieves an excellent sensor resolution. Finally, a time subtractor improves sensor accuracy by effectively eliminating the offset error effects. The proposed sensor was implemented in a Taiwan Semiconductor Manufacturing Company 0.35-μm CMOS process and occupied an area of 0.0247 mm2, which is the best area among related studies. The PSSTS exhibited an improved inaccuracy from a maximal inaccuracy of 1.95 °C to 1.5 °C and an excellent resolution of approximately 0.05 °C/LSB. Experimental results prove that this study is area-efficient and achieves improved accuracy and high resolution.