Electrical characterization of silicon-on-insulator structures with a nondamaging elastic–metal gate

This article explores electrical characterization methods for silicon-on-insulator (SOI) structures with a nondamaging elastic metal gate (EM gate). Important material electrical properties related to the top silicon layer, gate dielectric and interfaces, and buried oxide are addressed. The techniqu...

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Bibliographic Details
Published in:Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 2004-01, Vol.22 (1), p.450-454
Main Authors: Hillard, Robert J., Howland, William H., Tan, Louison C., Ye, Win
Format: Article
Language:English
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Summary:This article explores electrical characterization methods for silicon-on-insulator (SOI) structures with a nondamaging elastic metal gate (EM gate). Important material electrical properties related to the top silicon layer, gate dielectric and interfaces, and buried oxide are addressed. The techniques utilized are currently under development for SOI and are based on EM-gate capacitance–voltage methods, current–voltage methods, and a back channel metal–oxide–semiconductor transistor that utilizes elastic probes to form a temporary source and drain.
ISSN:0734-211X
1071-1023
1520-8567
DOI:10.1116/1.1621888