Low temperature ZEP-520A development process for enhanced critical dimension realization in reactive ion etch etched polysilicon

• Published in: Journal of vacuum science & technology. B, Microelectronics and nanometer structures processing, measurement and phenomena Microelectronics and nanometer structures processing, measurement and phenomena, 2007-01, Vol.25 (1), p.102-105
• Main Authors: Wang, H., Laws, G. M., Milicic, S., Boland, P., Handugan, A., Pratt, M., Eschrich, T., Myhajlenko, S., Allgair, J. A., Bunday, B.
• Format: Article
• Language: English
• ISSN: 1071-1023; 1520-8567
• DOI: 10.1116/1.2426976

The authors report on the realization of an enhanced process protocol for producing sub- 20 nm wide lines with extremely narrow pitches in electron beam resist using a low temperature development process. Linewidths ranging from 10 to 50 nm with a pitch range of 40 – 250 nm have been fabricated on 8 in. silicon wafers, using a JEOL JBX 6000 FS/E electron beam lithography tool at 50 kV accelerating voltage. ZEP-520A (Nippon Zeon) resist, a nonchemically amplified positive electron beam resist was employed for this effort due to its dry-etch resistance and high-resolution characteristics. The development of the ZEP-520A resist in ZED-N50 developer (Nippon Zeon) has been characterized and optimized for both low and room temperature developer conditions. In addition, standard reactive ion etch technologies have been utilized in conjunction with the low temperature developed ZEP-520A patterns to produce 10 nm range gratings in polysilicon substrates with aspect ratios of 10:1. These gratings are intended for evaluation by angle-dependent and wavelength-dependent optical scatterometry methods for critical dimension measurements. The authors report on the preliminary etch optimization as well as advanced inductively coupled plasma etch characteristics of the pattern transfer.