A radiation tolerant Data link board for the ATLAS Tile Cal upgrade

• Published in: Journal of instrumentation 2016-01, Vol.11 (1), p.C01074-C01074
• Main Authors: Åkerstedt, H., Bohm, C., Muschter, S., Silverstein, S., Valdes, E.
• Format: Article
• Language: English
• Subjects: algorithms; architecture; Boards; Data links; Design engineering; Detector control systems (detector and experiment monitoring and slow-control systems; Digital electronic circuits; Errors; Field programmable gate arrays; Front-end electronics for detector readout; fysik; hardware; Physics; Radiation effects; Radiation-hard electronics; Redundancy; Redundant
• ISSN: 1748-0221; 1748-0221
• DOI: 10.1088/1748-0221/11/01/C01074

This paper describes the latest, full-functionality revision of the high-speed data link board developed for the Phase-2 upgrade of ATLAS hadronic Tile Calorimeter. The link board design is highly redundant, with digital functionality implemented in two Xilinx Kintex-7 FPGAs, and two Molex QSFP+ electro-optic modules with uplinks run at 10 Gbps. The FPGAs are remotely configured through two radiation-hard CERN GBTx deserialisers (GBTx), which also provide the LHC-synchronous system clock. The redundant design eliminates virtually all single-point error modes, and a combination of triple-mode redundancy (TMR), internal and external scrubbing will provide adequate protection against radiation-induced errors. The small portion of the FPGA design that cannot be protected by TMR will be the dominant source of radiation-induced errors, even if that area is small.